Grooves formed around a semiconductor device on a circuit board



FIG. 1 shows a plan view of grooves formed around a semiconductor device on a circuit board showing our new design.

FIG. 2 shows an enlarged view of the claimed portion identified by the dot-dash line in FIG. 1; and,

FIG. 3 shows an enlarged sectional view along the line 3—3 in FIG. 2.

The special dot-dash broken line defines the boundary of the claimed design; the gray stippling indicates the surface of the groove bed; the broken lines show environmental detail for illustrative purposes only and form no part of the claimed design. 

The ornamental design for grooves formed around a semiconductor device on a circuit board, as shown and described. 